Senior PD Engineer - (Semiconductor) Engineering - iTest Bangladesh Limited

Job Description

Title: Senior PD Engineer - (Semiconductor) Engineering - iTest Bangladesh Limited

Company Name: iTest Bangladesh Limited

Vacancy: 10

Age: At least 22 years

Job Location: Dhaka (Mohakhali)

Salary: Negotiable

Experience:

• At least 6 years

• B.Sc./M.Sc. (or equivalent) in EEE, EE, CSE, Applied Physics, or a closely related discipline.

• Strong academic background in Digital Electronics, Semiconductor Devices, and VLSI Design.

• At least 6 years

• Age At least 22 years

• At least 06 years plus of relevant work experience is required.

• Familiarity with Linux/Unix environments.

• Basic programming or scripting knowledge in Python, TCL, Perl, Shell, or C/C++.

• Strong analytical, debugging, and problem-solving skills.

• Good verbal and written communication skills

• Ability to work effectively in a collaborative engineering environment.

• Ability to mentor and build up junior engineers (for Senior roles)

Good to have:

• Hands-on experience with the RTL-to-GDSII Physical Design flow.

• Knowledge of industry-standard Physical Design and Sign-off tools.

• Experience with STA, Physical Verification, and EMIR analysis.

• Experience developing automation scripts and design productivity tools.

• Exposure to advanced-node design and PPA optimization techniques.

• Experience working with global engineering teams and customers.

About the company: iTest Bangladesh Ltd. is a local business enterprise of iTest Inc., Headquarters in USA and is pioneers in the art and science of IC Testing - a reliable partners from development through production and a team with a track record of redefining a Test-Lab. Its mission is critical solution when second-best is not an option.

The vision of iTest Bangladesh Ltd. are driven to earn customers` trust and fascination with commitment to quality, dependability and cost competitiveness.

Website: https://itest.mj-group.com/

Job Responsibilities:

• Perform RTL-to-GDSII implementation for digital IC designs using advanced process technologies.

• Execute Physical Design and Sign-off tasks including Floorplanning, Power Planning, CTS, Place & Route, STA, EMIR, ECO, LEC, and Physical Verification.

• Optimize designs for Power, Performance, and Area (PPA).

• Develop automation scripts, design flows, and methodologies to improve productivity.

• Collaborate with cross-functional teams throughout the chip development lifecycle.

• Prepare project deliverables, technical documentation, and progress reports.

• Manage and coordinate project within the team (for senior roles).

• Mobile bill,Weekly 2 holidays,T/A,Performance bonus,Insurance
• Lunch Facilities: Full Subsidize
• Salary Review: Yearly
• Festival Bonus: 2

• Transportation Facility/ Pick & Drop

• Earned Leave Encashment

• Lunch Facilities: Full Free