Intern-RTL Design & Verification Engineering

Job Description

Title: Intern-RTL Design & Verification Engineering

Company Name: ADN Semiconductors

Vacancy: --

Age: Na

Job Location: Dhaka (Mohakhali)

Salary: --

Experience:

Published: 2026-04-07

Application Deadline: 2026-04-25

Education:

• Bachelor of Science (BSc) in Computer Science & Engineering
• Bachelor of Science (BSc) in Electrical & Electronic Engineering
• Bachelor of Science (BSc) in Electronics and Telecommunication Engineering
• Bachelor of Science (BSc) in Electronics and Communication Engineering

• Sound understanding of digital design fundamentals (combinational & sequential logic, FSMs, timing concepts).
• Familiarity with SystemVerilog; basic exposure to UVM or other verification methodologies is a plus.
• Understanding of RTL coding best practices and clean, synthesizable design.
• Basic knowledge of verification concepts such as testbenches, assertions, coverage, and debugging.
• Analytical mindset with strong problem-solving and attention to detail.
• Ability to learn quickly and adapt in a fast-paced engineering environment.
• Good communication skills and ability to collaborate within a technical team.
• Strong interest in semiconductors, ASIC/SoC/FPGA design, and verification workflows.

ADN Semiconductor, a concern of ADN Group, operates at the intersection of IT, Telecom, and advanced semiconductor engineering. As a Bangladesh-based front-end semiconductor design services and training organization, we provide a hands-on, production-oriented environment where young engineers can grow rapidly under the guidance of experienced mentors.

We are seeking motivated RTL Design & Verification Engineering Interns who are eager to build strong engineering fundamentals and contribute to real-world silicon design projects.

Job Responsibilities

• Participate in structured training programs and technical workshops on RTL design and verification.

• Work closely with senior engineers to translate design requirements into RTL implementations and verification environments.

• Contribute to SystemVerilog RTL coding, schematic capture, and UVM-based testbench development.

• Assist in design reviews, code reviews, and verification reviews, incorporating feedback to improve quality.

• Support debugging activities, regression testing, and coverage analysis.

• Prepare and maintain technical documentation, including design descriptions, verification plans, and test reports.

• Track issues, communicate findings clearly, and follow disciplined engineering practices.

• Stay updated with industry tools, standards, and best practices in digital design and verification.

• Monthly Allowance : BDT 8,000 (Paid Internship)

• Fully Subsidized Lunch

• Hands-on training with production-grade ASIC/SoC/FPGA projects

• Mentorship from experienced semiconductor engineers

• Opportunity for career growth and future placement based on performance