Senior Physical Design Engineer

Job Description

Title: Senior Physical Design Engineer

Company Name: Advanced Chemical Industries PLC (ACI)

Vacancy: 1

Age: 25 to 35 years

Job Location: Dhaka

Salary: Negotiable

Experience:

• At least 3 years
• The applicants should have experience in the following business area(s): IT Enabled Service

• Master of Science (MSc) in Electrical & Electronic Engineering, Communication Engineering, Electronics, Computer Engineering
• Bachelor of Science (BSc) in Electrical & Electronic Engineering, Communication Engineering, Electronics, Computer Engineering

• At least 3 years
• The applicants should have experience in the following business area(s): IT Enabled Service

• Age 25 to 35 years

• Proven experience in block-level Physical Design and exposure to full-chip integration activities.

• Experience in the complete Physical Design flow including Floor planning, Placement, CTS, Routing, Timing Closure, Power Optimization, Physical Verification, and Signoff.

• Experience with advanced technology nodes (28nm and below preferred).

• Experience working with semiconductor design service organizations, fabless IC companies, or product development teams will be preferred.

• Hands-on experience with Cadence and/or Synopsys Physical Design environments.

• Experience in scripting and design flow automation will be an added advantage.

• Strong expertise in block-level ASIC Physical Design implementation.

• Ability to independently execute assigned Physical Design blocks from netlist handoff through GDS-ready implementation.

• Proficiency in Floorplanning, Power Planning, Placement, CTS, Routing, Timing Closure, Physical Verification, and Signoff activities.

• Strong understanding of timing analysis, congestion management, power optimization, and physical implementation challenges.

• Experience with industry-standard EDA tools such as Cadence Innovus, Synopsys ICC2, Fusion Compiler, PrimeTime, StarRC, Calibre, or equivalent.

• Knowledge of TCL, Perl, Python, or Shell scripting for automation and productivity enhancement.

• Execute block-level and full-chip ASIC Physical Design activities including Floorplanning, Power Planning, Placement, CTS, Routing, Physical Verification, and Signoff Closure.

• Analyze and resolve timing, power, signal integrity, EMIR, and DRC/LVS issues under the direction of the Lead Physical Design Engineer.

• Collaborate with RTL, DFT, Verification, Package, and Foundry teams throughout the project lifecycle.

• Adhere to project quality standards and contribute to the timely delivery of physical design milestones.

• Participate in technical reviews, project status meetings, and customer discussions as required.

• Contribute to flow automation and methodology improvement initiatives within the team.

• Support effort estimation and documentation of Physical Design deliverables.

• Support Lead Physical Design Engineer in project delivery and capability development related initiatives.

• Provident fund,Medical allowance,Mobile bill,Weekly 2 holidays,Insurance,Gratuity
• Lunch Facilities: Partially Subsidize
• Salary Review: Yearly
• Festival Bonus: 2

• As per company policy